Post Doctorate Research Associate - Hardware Design Methodologies

Post-Doctoral Research Associate

The Pacific Northwest National Laboratory (PNNL) Future Computing Technology Group is seeking exceptional Post-Doctoral Research Associates to advance research in next-generation electronic design automation (EDA), specialized computing systems, and hardware prototyping. As the complexity of computing systems continues to increase, new methodologies are required to dramatically improve the productivity, automation, and accessibility of hardware design. Our team is developing innovative approaches that span the entire hardware design lifecycle, from high-level programming models and compiler technologies to high-level synthesis (HLS), architecture exploration, register-transfer level (RTL) generation, physical implementation, prototyping, and experimental validation.

This position offers a unique opportunity to work at the intersection of compilers, high-level synthesis, computer architecture, artificial intelligence (AI) for hardware design, and semiconductor prototyping. The successful candidate will contribute to research on advanced HLS capabilities, compiler-driven hardware generation, automated design-space exploration, and methodologies for translating high-level application descriptions into efficient hardware implementations.

Research may span open-source and commercial design ecosystems and include field-programmable gate array (FPGA) and application-specific integrated circuit (ASIC) targets, heterogeneous and domain-specific accelerators, chiplet-based systems, and emerging computing architectures. A major objective is to develop scalable, reproducible, and increasingly automated methodologies capable of moving from application and architectural specifications through hardware implementation, prototyping, and eventual silicon realization.

As a member of our collaborative and multidisciplinary team, the successful candidate will work with researchers in computer architecture, compilers, EDA, AI, semiconductor technologies, and scientific application domains. The position provides access to advanced computational resources, semiconductor design tools, prototyping platforms, electronics laboratory facilities and opportunities to participate in hardware fabrication and experimental validation activities. It also provides substantial opportunities to publish at premier conferences and journals and contribute to open-source research software.

Minimum Qualifications:

• Candidates must have received a PhD within the past five years (60 months) or within the next 8 months from an accredited college or university.

Preferred Qualifications:

• PhD in computer engineering or electrical engineering.
• Electronic design automation (EDA) and hardware synthesis methodologies.
• High-level synthesis (HLS) and hardware/software co-design.
• Compiler infrastructures and intermediate representations, particularly the LLVM and MLIR compiler infrastructures
• Hardware description languages such as Verilog, System Verilog, or VHDL.
• RTL simulation, synthesis, verification, and performance analysis.
• Field-programmable gate array (FPGA) design and prototyping.
• Application-specific integrated circuit (ASIC) design flows and semiconductor tapeout.
• Physical design and layout tools using open-source and/or commercial EDA tool chains.
• Hands-on experience working with electronics in a laboratory environment, including hardware prototyping, test and measurement equipment, system bring-up, or hardware debugging.
• Open-source EDA technologies such as Yosys, Verilator, OpenROAD, or related tools.
• Commercial FPGA or ASIC design environments.
• Design-space exploration and optimization techniques.
• Artificial intelligence and machine learning (AI/ML) techniques applied to compilers, architecture, or electronic design automation.
• Computer architecture, domain-specific accelerators, heterogeneous computing, or chiplet-based systems.
• Experience working with semiconductor process design kits (PDKs), standard-cell libraries, or hardware intellectual property (IP).
• Development of substantial research software using languages such as C++, Python, or related systems-programming languages.
• Experience with collaborative software development, version control, automated testing, and reproducible research workflows.