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FPGA​/ASIC Verification Engineer - Rochester, NY

Job in City of Rochester, Rochester, Monroe County, New York, 14602, USA
Listing for: MissionHires
Full Time position
Listed on 2026-06-20
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 130000 USD Yearly USD 100000.00 130000.00 YEAR
Job Description & How to Apply Below
Location: City of Rochester

Mission Hires is seeking an experienced FPGA/ASIC Verification Engineer to verify and validate FPGA-based embedded communication systems. You will craft comprehensive verification plans, build self-checking System Verilog/UVM environments, drive functional coverage closure, and collaborate cross-functionally to ensure designs meet stringent system requirements. This role includes preparing and presenting technical reviews and may require the ability to obtain and maintain US Security Clearance.

Responsibilities
  • Perform FPGA/ASIC design verification and validation of embedded electronic communication systems
  • Develop high-level and detailed verification test plans aligned with system requirements and specifications
  • Create self-checking test benches using System Verilog for verification and validation
  • Develop UVM/OVM components including agents, sequences, cover groups, predictors, and scoreboards
  • Author randomized and directed tests to achieve functional coverage goals and provide feedback to the team
  • Utilize advanced functional verification tools to collect and report functional coverage
  • Collaborate with cross-functional teams to define and verify product and design requirements
  • Analyze and debug FPGA firmware and related hardware issues
  • Prepare and conduct design and implementation reviews; deliver technical briefings and status updates to internal and external stakeholders
  • Work within Linux environments and leverage scripting to automate verification workflows
Requirements
  • Bachelor’s degree with 6+ years of relevant experience, or a Master’s degree with 4+ years, or 10+ years of relevant experience in lieu of a degree
  • Experience developing and verifying FPGA/ASIC-based embedded system solutions
  • Proven proficiency in FPGA/ASIC verification using System Verilog
  • Working knowledge of UVM/OVM methodology and ability to build reusable verification components
  • Experience creating randomized and directed tests and driving functional coverage closure
  • Ability to analyze and debug FPGA firmware and related hardware
  • Familiarity with Linux OS environments
  • Experience with scripting languages such as Bash, Perl, Python, or Tcl
  • Ability to obtain and maintain US Security Clearance
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