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Integrated Circuit Engineer

Job in San Diego, San Diego County, California, 92189, USA
Listing for: KPG99 INC
Part Time position
Listed on 2026-02-16
Job specializations:
  • Engineering
    Hardware Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below
Position: Application Specific Integrated Circuit Engineer

Please find the Job description below and share your latest resume if you are interested?

Position:
Senior ASIC Engineer with FPGA

Location:

Hybrid 2-3days a week in San Diego CA Duration: 6+ Months (Will be a Long Term Contract or CTH) PREFERRED TO WORK ON W2 OR 1099

These points below are for elaboration:
These are key in determining if the candidate is a fit. They must have current experience working in those areas.

  • Please explain your experience writing backend timing constraints.
  • Please explain your experience with basic FPGA testing (with C code).
  • Please explain your experience with backend timing analysis.
Job Description

The ASIC Engineer will be responsible for designing ASICs and FPGAs used in cellular products.

You will collaborate closely with other engineering teams (software, hardware and system) on architecture and system validation. Responsible for supporting our ASIC/FPGA development

effort including FPGA synthesis, Timing constraints, ASIC backend support, and FPGA low-level tests on the prototyping platform.

**** This role is a long-term contract position but requires on-site presence in our San Diego office a few days per week****

Verification and validation for our products’ ASIC and FPGA

Support other teams during product development.

Be proactive and identify problems early

Work Experience

Minimum of 10 to 15 years of ASIC & FPGA design.

Proven successful experience completing multiple ASIC tape-out, preferably as a technical chip leader.

Proven successful experience completing multiple FPGA designs for ASIC prototyping and products.

Experience working with other teams (software, hardware, and systems).

Nice to have:
High speed transceivers interfaces such as CPRI or JESD
204B

Nice to have: DDR4/ DDR5 experience

Arria 10 FPGA experience is preferable

Education

Minimum Bachelor's, Engineering, or other similar degree

Thanks and Regards

Karan Rajput |
US IT Recruiter

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