DDR Bench Test Engineer

Company:

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA

Engineering Group, Engineering Group >
Hardware Engineering

This position is for the Post Silicon Engineering group that develops test solutions for highly integrated SOCs (System on Chip). Main responsibilities include defining and executing the development of test methodologies and characterization of leading‑edge LP‑DDR & PC‑DDR subsystem components (DRAM, DRAM Controller, Mixed Signal PHY IP, IO circuits and termination networks, Clocking architecture, Delay circuits, Power Distribution Network) as well as other proprietary interfaces.

Responsibilities also include developing and executing characterization plans for High Speed IPs to optimize design parameters and validate electrical compliance, driving corresponding first silicon bring‑up & debug to qualify designs fabricated at external foundries and performing technical data analysis of parametric performance over various operating conditions and configurations. This would include developing and automating test scripts, measurement procedures, and data processing flows to accelerate silicon evaluation.

The engineer will also assist in HW design and debug power integrity (PI) and signal integrity (SI) issues related to package and board design. The engineer will work closely with cross‑functional teams such as IC Design, Systems Engineering for chip/circuit bring‑up and debug, and with Customer Engineering and Hardware Applications teams to resolve customer issues / RMA debug in a time‑critical environment.

This position is ideal for engineers who excel in silicon debug, high‑speed interface analysis, and data‑driven optimization of complex mixed‑signal systems. The individual selected for the position should be passionate about delivering quality work products, seek to continually learn about new products, and have essential knowledge of industry trends, competitor products, and advances in various engineering fields from publicly available information and assist in conducting specialized analyses (e.g., feasibility studies, signal integrity, teardown analyses).

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

• English fluent (>95% verbal and written).
• Work Experience:
  
  1‑3+ years of experience in related areas. (Fresh graduates welcome to apply)
• Experience with Python/C# for test automation is required.
• Master's Degree in Electrical/Computer Engineering or related field.
• Good understanding of VLSI technologies, CMOS analog and digital integrated circuits, mixed‑signal and semiconductor physics.
• Knowledge of high‑speed test and characterization including eye diagram characteristics, differential signals, jitter analysis, signal integrity etc. is preferred.
• Familiarity with DDR 2/3/4/5, LPDDR 2/3/4/5 protocol, interface, IO receiver/transmitter, timing diagrams and device specifications is a plus.
• Hands‑on experience with lab equipment such as oscilloscopes, TDRs/VNAs, J‑BERT etc. is preferred.
• Familiarity with board design concepts (schematic reviews, layout best practices etc.) is a plus.
• Good ASIC device‑level characterization skills. System‑level knowledge is a plus.
• Knowledge in test automation development/scripting/debugging is a plus.
• Strong verbal and written communication skills as well as good organization and documentation skills.
• Strong problem‑solving & debugging skills. Ability to work independently and with good initiative to overcome technical challenges.
• Strong interpersonal and teamwork skills with proven ability to work effectively in a fast‑paced multi‑disciplinary environment.
• Document characterization results, debug findings, methodology updates, and design recommendations with clarity and technical rigor.
• Able to work independently and with good initiative to overcome technical challenges. Meeting project deadlines and characterization (char) milestones would be required.
• Strong verbal and written communications skills. Effective communication within and outside the team is essential. Clear, data‑driven analysis and preparing…