Cloud AI Accelerator Memory Architect

General

Summary:

Qualcomm’s growing Cloud AI Data Center Architecture team is defining the next-generation cloud AI data center products to serve Large Language Model and Generative AI inference workloads, which demand exceptional effective memory bandwidths & capacities for effective compute.

We are seeking computer architects skilled in AI accelerators and memory architecture, with experience in memory systems, DRAM, and/or emerging memory technologies such as processing in memory (PIM) and 3

DIC, to drive the analysis and development of future generations of transformational memory architecture.

If you’d like to be a member of collaborative multidisciplinary architecture team within a dynamic and growing Cloud AI Data Center Architecture team, and if you’re passionate about shaping the future of the world’s most advanced technologies, we want to hear from you!

In this exciting and dynamic role, you will have the opportunity to innovate, analyze, and help define multiple generations of AI acceleration and memory system solutions which will be pivotal not just for the technical direction and competitiveness of Qualcomm’s products, but will be on the cutting edge within the Ai accelerator and memory industry as a whole.

You will engage with Cloud BU architects to understand product requirements; analyze accelerator and memory technologies; quantify tradeoffs; and influence the technical direction with data-driven justification. Throughout the process, you will effectively communicate and collaboratively engage with the other SoC & IP architects, designers, systems engineers, product managers, and software teams to enable market-leading Cloud AI and Data Center products.

Skills/

Experience:

• Computer architecture background and the quantitative analysis tools and methods
• Analytical, behavioral, functional, and performance modeling and analysis
• Simulator architectures and frameworks (C++ or Python-based preferred)
• Preferably experience in instruction set definition, extensions, and documentation
• Background in memory systems, understanding the tradeoffs among bandwidth, latency, power, etc.
• Understanding of DRAM memory organization and architecture, memory controllers & scheduling across one or more protocols such as LPDDR, HBM, DDR, GDDR, etc.
• Record of quantitative analysis using (and developing) tools such as high-level calculators & spreadsheets, DRAM timing simulators, profilers, functional and performance simulators, etc.
• Preferably exposure to novel memory technologies such as processing-in-memory (PIM), processing-near-memory, 3
  
  DIC, etc.
• Ability to abstract appropriately to define problems and solutions, and make data-driven decisions
• Excellent communication, documentation, and interpersonal skills with ability to convey proposals and interact effectively across a distributed multi-discipline organization
• Self-driven execution and a focus on accuracy and rigorous methodology

Preferred Qualifications:

• MS or PhD degree in EE/ECE/CE/CS or related field required
• 5-10 years of experience in computer architecture, AI accelerators, memory architecture, memory technologies

Additional Qualifications:

• Generative AI & Machine Learning workloads, especially Large Language Model inference
• Processor architecture, including ISA design & microarchitecture
• Exposure to one or more of: power, thermals, reliability, RAS, ECC, security, encryption, PHYs, packaging
• Works within the prescribed budgetary objectives of the department. Erroneous decisions, failure to achieve results may cause delays in schedules and result in the re-allocation of some resources.
• Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).
• Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework.
• Exceptional creativity to innovate new ideas and develop innovative products/ processes without established objectives or known parameters.
• Deductive and inductive…