Staff Engineer, ASIC Design​/Implementation - LEC​/STA​/Power Analysis

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOC) to systems of chips. In the era of Accelerated Computing, data center bottlenecks are no longer limited to compute performance, but rather the system interconnect bandwidth, memory bandwidth, and memory capacity. Marvell's Photonic Fabric is the next-generation interconnect technology that delivers a tenfold increase in performance and energy efficiency compared to competing solutions.

The Photonic Fabric is available to our customers in multiple technology offerings, including optical interface chiplets, optical interposers, and Optical Multi-chip Interconnect Bridges (OMIB). This allows customers to easily incorporate high bandwidth, low power, and low latency optical interfaces into their AI accelerators and GPUs. The technology is fully compatible with both protocol and physical layers, including standard 2.5D packaging processes.

This seamless integration enables XPUs to utilize optical interconnects for both compute-to-compute and compute-to-memory fabrics, achieving bandwidths in the tens of terabits per second with nanosecond latencies.

This innovation empowers hyperscalers to enhance the efficiency and cost-effectiveness of AI processing by optimizing the XPUs required for training and inference, while significantly reducing the TCO2 impact. To bolster customer collaborations, Marvell is developing a Photonic Fabric ecosystem consisting of tier-1 partnerships that include custom silicon/ASIC design, system integrators, HBM memory, assembly, and packaging suppliers.

What You Can Expect

We are seeking a highly skilled and experienced Timing/STA Engineer to join our team. The ideal candidate will have a strong background in timing constraints development, STA Signoff/Margins flows & methodologies for both SOC level and block level. They should have experience that includes running STA signoff flows, understanding of STA signoff margins, generating timing ecos, developing timing constraints, timing budgeting, optimization and timing closure of high-speed designs.

Additionally, experience with deep technology nodes such as 5nm/4nm would be valued.

* Develop and validate timing constraints for intricate SoC designs.

* Collaborate with Architecture, RTL, DFT, and Analog teams to understand the design requirements, analyze the timing complexities, and develop consolidated timing modes and constraints for sta signoff.

* Own and contribute to various sta related tasks like doing timing ecos for blocks and SoCs, developing custom scripts to create histograms, sta flow management, etc.

* Perform static timing analysis (STA) using industry-standard tools (e.g. Primetime).

* Define and implement timing signoff methodologies, including process corners, derates, and uncertainties.

* Resolve or find workarounds for tool issues, independently or working with EDA tool vendors.

* Conduct post-route timing checks and quality of results (QoR) analysis.

* Automate STA related processes/flow using scripting languages such as Tcl or Python.

* Create QoR dashboards, histograms for STA runs across all modes.

* Ensure compliance with timing signoff checklists and criteria.

* Document best practices and lessons learned to drive continuous improvements in future projects.

What We're Looking For

* Bachelor's degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional experience OR Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-3 years…