Silicon Validation Engineer

Description

• Lead efforts to bring up, validate, and characterize high-speed Ser Des blocks.
• Possess hands‑on experience with various high‑speed Ser Des architectures, including NRZ and PAM, and associated protocols.
• Demonstrate in‑depth knowledge of crucial Ser Des blocks such as CTLE, DFE, FFE, CDR, and PLLs, including their characterization and debugging processes.
• Be proficient in using test and measurement equipment like high‑speed oscilloscopes and BERTs.
• Understand Ser Des adaptation techniques.
• Analyze Ser Des signal integrity.
• Experience with high‑speed protocols such as USB, PCIe, DP, etc.
• Exhibit strong debugging and problem‑solving skills, with data investigation and mining expertise.
• Develop robust test methodologies to evaluate performance and calculate high‑speed serial interface operating margins across PVT variations.
• Support ATE and Product Engineering.

• BSEE and 7+ years related industry experience

• MSEE and 7+ years related industry experience
• Python programming experience

Base pay range for this role is between $171,600 and $302,200.

Apple employees may also participate in Apple’s discretionary employee stock programs, stock purchase plan, and may receive discretionary bonuses or commission payments, as well as relocation compensation.

Benefits include comprehensive medical and dental coverage, retirement benefits, discounted Apple products and services, and reimbursement for certain educational expenses (including tuition).

Apple is an equal‑opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics.