Principal​/Sr. Principal Digital Engineer

Position Overview

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people’s lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation’s history – from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon.

San Diego, CA – based at the Northrop Grumman San Diego campus.

You will be responsible for digital designs associated with multi‑function software‑defined radios. Systems include state‑of‑the‑art radios and test equipment for military applications. This is a dual‑level requisition that can be filled as a Principal Digital Engineer or a Sr. Principal Digital Engineer.

• 5+ years of relevant experience with a Bachelor of Science in Electrical Engineering (BSEE) or Computer Engineering (BSCE); 3 years of relevant experience with a Master’s; 1 year of experience with a PhD.
• Hands‑on experience in VHDL design, verification, simulation, and testing of AMD and/or Intel FPGAs.
• Experience with Electronic Design Automation (EDA) tools for FPGA development:
  Vivado, Quartus, Questa Simulator.
• Demonstrated ability to work independently, taking initiative to complete tasks with minimal supervision while contributing to team success.
• Experience with board or system‑level debug using common test equipment.
• Must have the ability to obtain and maintain a US Government Secret clearance.

• 8+ years of relevant experience with a Bachelor of Science in Electrical Engineering (BSEE) or Computer Engineering (BSCE); 6 years of relevant experience with a Master’s; 4 years of relevant experience with a PhD.
• Hands‑on experience in VHDL design, verification, simulation, and testing of AMD and/or Intel FPGAs.
• Experience with Electronic Design Automation (EDA) tools for FPGA development:
  Vivado, Quartus, Questa Simulator.
• Demonstrated ability to work independently, taking initiative to complete tasks with minimal supervision while contributing to team success.
• Experience with board or system‑level debug using common test equipment.
• Must have the ability to obtain and maintain a US Government Secret clearance.

• Knowledgeable in physical constraints, timing constraints, and achieving timing closure.
• Experience with developing FPGA requirements and being able to show traceability to requirements and technical references.
• Proven experience creating design‑assurance deliverables and assembling technical data packages.
• Familiar with multilayer board design, high‑speed interfaces, and RF communication systems.

Position is contingent upon obtaining and maintaining a US Government Secret clearance and future program awards.

Northrop Grumman provides health insurance coverage, life and disability insurance, a savings plan, company‑paid holidays, and paid time off (PTO) for vacation and/or personal business. Employees may be eligible for overtime, shift differential, discretionary bonus, annual bonuses, and long‑term incentives.

Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit  U.S. citizenship is required for all positions with a government clearance and certain other restricted positions.