Sr. Engineer TECHM

FPGA Design & Verification Engineer - Senior Level

Contribute to the specification, design, implementation and validation of FPGAs within highly reliable electronics for ASML's EUV systems. Participate in cross-functional teams and work with multiple engineering groups to outline and create FPGA designs and associated engineering documentation. Design, implement and test new FPGA features while using robust methodologies defined as a part of the design process. Work with advanced technologies including SoC architecture, digital communication (PCIe, 1G+ Ethernet, EtherCAT, etc), photo-detectors, signal acquisition, and distributed high precision time stamping.

Assist cross-functional teams with the integration of the FPGA designs into the system environment.

Qualifications:

• 15+ years experience in electronic design and verification, with hands-on experience in requirements specification, detailed design, verification plan, design validation and qualification
• Deep knowledge of digital design fundamentals, including clock-domain-crossing (CDC)
• Strong competence of FPGA tooling including synthesis, building, timing analysis and simulation
• Experienced with architecting and coding FPGAs using VHDL
• Experience with System Verilog and UVM framework proficiency a plus for verification
• Hands-on experience with board, module and system level electronic troubleshooting, including experience with engineering test equipment such as logic analyzers and bus analyzers
• Bash/perl/python scripting a big plus for verification, validation and process automation
• Knowledge of Makefile a plus, familiarity with Linux/Unix OS is needed
• Knowledge of change management and revision control tools such as SVN or Git will be a plus
• Strong communication skills and ownership of solution space, including ability to author technical specifications, and procedures and driving to completion with minimum oversight
• Demonstrated ability to work in a process driven environment, with a structured problem solving approach
• BSEE required, MSEE preferred

Duties and Responsibilities:

• Create FPGA requirement specifications from contributing flow down documents
• Generate test specifications to track and ensure functional specifications are fully met
• Ability to work independently as well as communicate and work well within the FPGA team
• Interact with other design groups such as software and controls to facilitate the design integration effort
• Apply use of best design practices with a strong bias of what it takes to deliver highly reliable designs
• Own quality of all assigned deliverables