Mechanical Engineering Technical Leader

ASIC Mechanical Engineer

We are seeking a highly experienced and driven ASIC Mechanical Engineer to join the Cisco ASIC Group. In this role, you will lead mechanical and thermomechanical simulation efforts for ASICs and complex silicon/package/board assemblies, driving design decisions and ensuring product reliability for high-performance Cisco systems.

You will work across a globally distributed team and play a key role in shaping simulation methodologies, reliability strategies, and design guidelines across packaging, board-level integration, and system hardware engineering.

Your Impact

• Lead and perform advanced finite element analysis (FEA) to evaluate thermomechanical behavior and reliability of ASIC packages and board-level assemblies, including stress, warpage, and interconnect integrity.
• Own and drive solder joint reliability assessments, including thermal cycling, mechanical shock, and vibration, and develop lifetime prediction methodologies.
• Model and analyze nonlinear and time-dependent material behavior, including creep, viscoplasticity, and fatigue, with strong understanding of temperature and rate effects.
• Define and establish simulation methodologies, modeling best practices, and correlation strategies for packaging and board-level reliability.
• Drive correlation between simulation and reliability testing (e.g., TCT, drop, field returns) to improve predictive accuracy and enable design signoff.
• Influence product design by providing data-driven recommendations, risk assessments, and reliability sign-off criteria early in the development cycle.
• Lead root cause analysis for mechanical/reliability failures and guide cross-functional teams toward robust solutions.
• Develop and scale simulation workflows and automation using Python, Fortran, or similar tools to improve team efficiency and consistency.
• Communicate complex technical findings clearly to stakeholders across mechanical, packaging, and system teams.

Minimum Qualifications

• Bachelors + 8 years, or Masters + 6 years, or PhD + 3+ years in mechanical engineering or related field.
• Strong experience in thermomechanical simulation of semiconductor packages and/or board-level assemblies.
• Proven track record in solder joint reliability analysis, including fatigue and/or creep modeling.
• Deep hands-on experience with ABAQUS or ANSYS, including nonlinear material modeling.
• Demonstrated ability to drive technical decisions and work across global teams.

Preferred Qualifications

• Expertise in board-level reliability (BLR) and PCB–package interaction modeling.
• Professional with solder constitutive models (e.g., Anand) and fatigue life prediction methods (Coffin-Manson, Darveaux).
• Knowledge of JEDEC/IPC standards for reliability qualification.
• Experience with advanced packaging (flip chip, 2.5D/3D, heterogeneous integration).
• Track record of correlating simulation with test data and driving design improvements.