SOC Platform Architect

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group  ASICS Engineering General

Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products.

Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications:

Bachelor's degree in Science, Engineering, or related field.

General

Summary:

The infrastructure IP Team consists of a multi-disciplinary group involved in the definition and design of Platform infrastructure HW components such as Interconnect (NOC), System Cache, Memory controllers and System MMU that are implemented in all Qualcomm SoCs. This position primarily involves working with HW architect to gather and define deployment spec/strategy for the next generation of SOC Infra HW IPs with ARM Architecture enabled and beyond.

The ideal candidate should have a strong background in ASIC design and computer architecture while demonstrating good system level design/architecture understanding. The candidate will be required to co-ordinate with domain leads to ensure a robust infrastructure deployment plan based on product requirements. It requires understanding of HW architecture, HW-&-SW feature trade-off, and the complete silicon HW end-2-end design flow.

Minimum Qualifications:

Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, or related work experience.

ORMaster's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, or related work experience.

Skills/

Experience:

Robust understanding of computer architecture

Basic understanding of end-end ASIC design flows

Knowledge in SOC and Infrastructure IP (NOC, SMMU, Caches) HW architecture

Exposure to some form of interconnect protocol

Exposure to programming language for automation

Ability to quickly react and adapt to changes

Excellent communication skills

Preferred

Qualification:

Exposure to Quality of Service, Clocks, Power management, Security and Debug architectures and their respective software interfaces

Good knowledge in industry standard Interconnect Protocol and IO Devices Protocol Understanding of HW-SW interfaces and firmware

Experience in post-silicon flows and debugs

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EEO

Employer:

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary…