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Principal Engineer SOC​/ASIC Design

Job in San Diego, San Diego County, California, 92101, USA
Listing for: Qualcomm
Full Time position
Listed on 2026-08-12
Job specializations:
  • Engineering
    Systems Engineer, Test Engineer, Hardware Engineer
Job Description & How to Apply Below

Job Title

ASIC/Chip Designer

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

Qualcomm's Cloud Business Unit is building next-generation AI inference rack scale solutions, anchored by the AI200/AI250 accelerator family. We are seeking a seasoned and experienced ASIC/Chip designer to work on the next generation AI products in the datacenter.

We are looking for an experienced ASIC Lead whose expertise spans chip development process from early architecture phase to post-silicon commercialization. This role requires working in leading technology nodes and processes to innovate and deliver next-generation products.

Key Responsibilities
  • Develop architecture and module specifications
  • Analyze performance, area, power, and system cost tradeoffs for different implementations
  • Provide guidance to different IP teams regarding product requirements
  • Work with SOC team in defining the execution plan encompassing design, DV, synthesis, DFT, PD phases leading to tapeout
  • Work with Packaging team to develop System-In-Package (SIP) encompassing SOC and different memory/compute chips
  • Define and monitor pre-Silicon functional and performance validation plans followed by same on Silicon
  • Coordinate with Production Test Engineering to drive commercialization rollout
  • Work with datacenter SW and HW teams for deployment in the datacenter.
Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

Preferred Qualifications

• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.

• 12+ years of ASIC design, verification, validation, integration, or related work experience.

• 4 + years of experience with architecture and design tools.

• 4 + years of experience with scripting tools and programming languages.

• 4 + years of experience with design verification methods.

• 2 + years of work experience in a role requiring interaction with senior leadership (e.g., Vice President level and above).

• 1+ year of working with operating budgets and/or project financials.

Pay Range and Other Compensation & Benefits

$ - $

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation  also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).

In addition, our highly competitive benefits package is designed to support your success at work, at home, and r recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

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