Always On Subsystem Power Management Firmware Engineer

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group  ASICS Engineering General

Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products.

Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

ORMaster's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

ORPhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

As an Always ON Power Management FW Developer, you are responsible for working with a team on the enablement of the power management solution for Qualcomm's SOCs. You will collaborate internally to help define and implement embedded firmware to manage operation of the Always ON subsystem to manage the distribution of allocated power and thermal budgets. You will also be responsible for helping characterize existing and new  the Always ON Power Management FW developer role, with focus on limits management, you will be working closely both with the hardware power management and firmware development teams.

You will have an opportunity to engage with third parties on enablement of new platforms, as well as providing input to our SoC and platform architects on future designs.

Preferred Qualifications:

• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
• 6+ years of ASIC design, verification, validation, integration, or related work experience.
• 2 + years of experience with architecture and design tools .
• 2 + years of experience with scripting tools and programming languages .
• 2 + years of experience with design verification methods.
• 1 + year of work experience in a role requiring interaction with senior leadership (e.g., Director level and above).Principal

Duties & Responsibilities:

• Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.
• Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
• Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs.
• Evaluates all aspects of complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.
• Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages.
• Writes and reviews detailed technical documentation for complex EDA/IP/ASIC projects.

Level of Responsibility:
• Works independently with minimal supervision.
• Provides supervision/guidance to other team members.
• Decision-making is significant in nature and…