Pre-Silicon Validation Engineer ASICS Engineering

Company

Qualcomm Technologies, Inc.

Engineering Group, Engineering Group > ASICS Engineering

This position is not eligible for Qualcomm immigration sponsorship.

Post-Silicon Validation Engineer

San Diego, CA (Onsite)

We are seeking a highly motivated and experienced Junior/Senior Emulation Engineer to support the development and validation of complex ASIC and FPGA-based designs. The ideal candidate will have a strong background in hardware emulation, RTL verification, system-level debugging, and software-hardware co-validation. Experience leveraging AI-driven productivity tools and automation techniques for design verification and debug is highly desirable.

• Develop, deploy, and maintain ASIC/FPGA emulation environments for complex SoC designs.
• Port RTL designs onto industry-standard emulation platforms such as Cadence Palladium, Siemens Veloce, or FPGA prototyping systems.
• Work closely with RTL, verification, architecture, and software teams to enable early hardware/software co-validation.
• Develop test benches, transactors, and verification infrastructure using System Verilog and C/C++.
• Analyze and debug functional, performance, and system-level issues in emulation environments.
• Create automation scripts and workflows using Python to improve productivity, regression execution, and debug efficiency.
• Collaborate with design teams to optimize designs for emulation performance and resource utilization.
• Develop methodologies for waveform analysis, signal tracing, and failure root-cause identification.
• Apply AI-assisted tools and techniques to accelerate verification, debug, data analysis, and engineering productivity.
• Generate technical documentation and present findings to cross-functional teams and leadership.

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 0-2+ years of experience in ASIC verification, FPGA prototyping, or hardware emulation.
• Strong expertise in:
  • System Verilog
  • C/C++
  • Linux environment and shell scripting
  • Python programming
  • ASIC and FPGA Emulation platforms
• Experience with RTL debugging, waveform analysis, and design verification methodologies.
• Knowledge of SoC architectures, bus protocols, and hardware/software interactions.
• Strong analytical and problem-solving skills.

• Experience with Cadence Palladium, Protium, Siemens Veloce, or Synopsys ZeBu platforms.
• Familiarity with FPGA implementation flows using Xilinx or Intel FPGAs.
• Exposure to AI/ML technologies and AI-powered engineering tools.
• Knowledge of PCIe, CXL, DDR, Ethernet, or other high-speed interfaces.
• Experience with cloud-based compute environments and large-scale regression management.

• System Verilog
• C/C++
• Linux
• Python
• ASIC Emulation
• FPGA Prototyping
• SoC Verification
• Hardware/Software Co-Validation
• Debug and Root Cause Analysis
• AI-Assisted Engineering Tools
• Automation and Scripting
• Cross-Functional Collaboration

• Bachelor's degree in Science, Engineering, or related field.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disabili or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.

Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

$98,500.00 - $

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation  also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).

In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.