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Principal Chipset Project Engineer – Hardware PCB​/Platform Systems Personal Compute; PC)

Job in San Diego, San Diego County, California, 92189, USA
Listing for: Qualcomm
Full Time position
Listed on 2026-09-04
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Test Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 193000 - 289000 USD Yearly USD 193000.00 289000.00 YEAR
Job Description & How to Apply Below
Position: Principal Chipset Project Engineer – Hardware PCB/Platform Systems for Personal Compute (PC)

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group >
Systems Engineering

General Summary

Qualcomm's Chipset Systems & Architecture team drives definition of industry-leading chipsets through analysis of chipset partitions, PMIC and power grid, and power distribution network (PDN), clock distribution network, chipset interfaces, PCB and Platform cost, power and performance optimization. Please note “Chipset” in this context refers to the set of chips that make a product and includes the main SOC, Power Management chips, codec, wireless connectivity and modem.

We are seeking a Principal Chipset Project Engineer – Hardware PCB/Platform Systems for Personal Compute (PC) to lead Platform/PCB strategy across the entire compute product portfolio. This is a leadership role responsible for defining PCB and hardware platform architecture, driving cost‑optimized system decisions, enabling scalable solutions, influencing platform direction and roadmaps, and engaging with vendors, OEMs, and ODMs to enable competitive PC platforms.

The lead will work closely with Product Management, PC engineering leads, Packaging and PCB design engineers, Signal and Power Integrity engineers, Customer Engineering, Sourcing & vendor contacts to ensure we meet aggressive cost, area, power and performance targets for Qualcomm’s Compute PCB, Platform & Systems solutions. Decisions made in this role directly and materially impact platform cost, manufacturability, scalability, and market competitiveness.

Responsibilities
  • Lead early PCB architectural trade‑off decisions, evaluating solution options and clearly articulating cost, power, performance, and risk implications in architecture reviews, product councils, and leadership forums.
  • Set, execute, and own targets for PCB cost, area, and bill of materials while maintaining best‑in‑class power and system performance.
  • Drive PCB competitiveness across platforms, including layer count and stack‑up minimization, board area and routing efficiency, customer design simplicity, and platform reuse across SKUs and generations.
  • Provide cross‑functional leadership & establish partnership across chipset systems & architecture, product management, packaging, platform hardware, SI/PI, validation, test, software, and customer engineering to ensure coherent end‑to‑end execution.
  • Engage with vendors, OEMs, and ODMs to align on early platform and PCB architecture and enable manufacturable, cost‑effective designs.
  • Establish best practices and execution playbooks for cost‑driven platform and PCB architecture to enable repeatable, scalable execution.
  • Influence future chipset and platform roadmaps using execution experience and competitive analysis of industry platforms.
Minimum Qualifications
  • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Systems Engineering or related work experience.

OR

Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Systems Engineering or related work experience.

OR

PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience.

Preferred Qualifications
  • 12+ years of experience in hardware platform architecture and PCB design with a focus on the personal computer (PC) segment.
  • Strong understanding of PCB architecture fundamentals, including layer drivers, stack‑up trade‑offs, routing density, and cost impacts.
  • Strong knowledge of power delivery networks (PDN), signal integrity (SI), and power integrity (PI), and how these constraints drive PCB architecture, stack‑up, and layout decisions.
  • Proven track record of making early architectural decisions that materially impact platform cost, complexity, manufacturability, and scalability.
  • Ability to clearly articulate PCB design and architectural choices and their impact on cost, power, performance, and manufacturability, and to work with vendors, OEMs, and ODMs to drive scalable, low‑cost strategies across products.
  • Demonstrated ability to lead and influence across highly matrixed, cross‑functional teams.
  • Strong communication skills with…
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