Digital ASIC Design Engineer

ASIC Engineer

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products.

Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field.

Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills. This is a great opportunity to join a fast-paced SoC team responsible for RTL Design, flows and methodology for high performance ASICs in sub-4nm process for mobile, automotive, compute, AI and XR space.

An ideal candidate will oversee definition, design, verification, and documentation for ASIC development for a variety of products. Determines architecture design, logic design, and system simulation. Provides technical expertise for next generation initiatives.

Principal Duties & Responsibilities

• Uses tools/applications to execute the architecture and design of SOC according to design protocol provided.
• Resolves architecture, design, or verification problems by applying sound ASIC engineering practices with some supervision.
• Executes the design and supports verification efforts of ASICs, SoC, and IP cores or own specific assigned part of a block with supervision from project lead with focus on clock/power related features
• Participate in the design and analyses of IPs
• Identify areas for flow and process improvements
• Feedback silicon learnings to improve design methodology, IP, SoC design

Requirements

• Bachelor's degree in Science, Engineering, or related field
• RTL design experience with Verilog/System Verilog or VHDL
• Proficiency in any automation/scripting language such as Python/Perl

Preferred Qualifications

• Master's degree in Electrical Engineering, Computer Science, or Computer Engineering.
• 6+ months of relevant experience in ASIC design, scripting, architecture
• Specific experience in clock design of ASIC/SOC

Pay range and Other Compensation & Benefits :

$98,500.00 - $

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation  also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).

In addition, our highly competitive benefits package is designed to support your success at work, at home, and r recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.