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SOC Platform Architect

Job in San Diego, San Diego County, California, 92189, USA
Listing for: Nutanix
Full Time position
Listed on 2026-06-29
Job specializations:
  • IT/Tech
    Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 211900 - 317900 USD Yearly USD 211900.00 317900.00 YEAR
Job Description & How to Apply Below
Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group  SoC Architecture General

Summary:

Qualcomm’s SoC Platform Architecture team defines platform architectures & solutions enabling the next-generation of system-on-chip (SoC) products across Qualcomm’s business lines including cloud, compute, automotive, mobile, wearables, XR and IoT. Our team performs analysis, defines, and delivers innovative and scalable architectures across key technologies including heterogenous compute, memory systems, interconnects, multimedia, AI/ML, multi-die, power-management and more. We collaborate directly with software, systems, design, product marketing, and customers.

We are currently seeking exceptional architects to join us in our mission to innovate and deliver the most advanced and scalable SoC platform architectures in the industry.

Responsibilities includes but not limited to:

Create highly scalable SoC architecture in the area of Network-On-Chip, System MMU, Interrupts, Debug, Power Management & Security Comprehend product requirements to steer generation of proper architecture.

Perform trade-off analysis in the solution space to produce the most optimal architecture

Collaborate with architects, technical leads, hardware and software engineers from various functional areas in deriving the architectural solution that can best integrate in the overall SoCGenerate detail architectural specification and work closely with design team to implement the architecture

Skills/Experience :

Excellent communication, documentation, and interpersonal skills with ability to convey proposals and interact effectively across a distributed multi-discipline organization

Strong foundation of silicon design principles and architectural trade-offs Ability to span and connect levels of abstraction across system-design, high-level languages, OS, HW/SW interface, micro-architecture, and silicon implementation

Background in architecture (IP or SoC), and/or front-end design/verification (micro-architecture)
Demonstrated deep technical knowledge and achievements at the SoC, sub-system or large IP levels as micro-architect or architect

Ability to apply appropriate abstractions and quantitative analysis for problem definition and solutions

Experience in using, improving, and developing a variety of tools for analysis and modeling, such as functional and performance simulators, profilers, etc.

Programming ability for modeling and automation (OOP C++, Python preferred) with experience in software development best practices including reviews, unit-testing, version control, etc.

Ability and desire to develop and improve architecture methodologies for experiments and analysis

Preferred with experience in the area of general SoC architecture (SoC Arch lead).

Qualifications:

Bachelor’s degree in Electronic Engineering, Computer Science or related field required;
Master’s degree or PhD highly desired
15+ years of SoC/IP architecture or micro-architecture/front-end-design

Candidates with primarily a micro-architecture/design background must have contributions that demonstrate higher-level analysis and design

Additional Experience and Expertise (the more the better)
SoC architectures including heterogeneous compute, NoC/interconnect, memory-systems, multicore, multi-die, cache hierarchies, shared memory, I/O, coherency, compression, security

Ability to understand different packaging technologies and respective trade-offs Resource and Power Management Security Architecture System-level debug

Safety, reliability, and high-resilience/high-availability systemsAI & Machine Learning Control and Real-time systems

High-level Operating Systems (e.g., Android, Linux, Windows)
Real-time operating systems (e.g., Zephyr, FreeRTOS)
Front-end Digital Hardware Design or Verification Arm system architectures (e.g., Cortex-A, Cortex-R, Cortex-M, SMMU, GIC, Core Sight)
RISC-V architecture

High-speed I/O (USB, PCIe, CXL)
External memory and storage architectures (e.g., LPDDR, NAND Flash, NOR Flash)
Networking & Connectivity (e.g., Ethernet, WLAN, Cellular, CAN)
Behavioral, functional and performance modeling

Power and/or performance optimization through simulation &…
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