Hardware Verification Engineer

Overview

I’m working with a well-funded semiconductor IP company building next-generation interconnect and fabric technology for advanced SoCs and chiplet-based designs.

They’re looking for a senior verification engineer to take real ownership of IP-level and system-level verification on complex, configurable hardware.

• Owning verification for advanced semiconductor IP blocks
• Building UVM-based System Verilog test benches from scratch
• Writing test plans, checkers, scoreboards, and coverage models
• Driving debug, failure analysis, and coverage closure
• Working closely with design and software teams on highly configurable systems
• Contributing to verification methodology and flow improvements

• Strong hands-on experience in hardware verification
• Deep knowledge of System Verilog and UVM
• Experience verifying IP and/or SoC-level designs
• Familiarity with on-chip interconnects and protocols such as AXI, APB, or AHB
• Comfortable scripting in Python or similar
• Experience with formal, emulation, or advanced verification techniques is a plus

• High technical ownership in a true deep-tech environment
• Work on modern SoC and chiplet architectures
• Small, senior team with strong engineering culture
• Competitive compensation and equity
• Real impact on products going into silicon

If you’re a senior verification engineer who enjoys building things properly and working close to the architecture, this is worth a conversation.