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Entry-Level ASIC Verification Engineer — Shape -Gen Silicon
Job in
San Francisco, San Francisco County, California, 94199, USA
Listed on 2026-02-25
Listing for:
Cisco
Full Time
position Listed on 2026-02-25
Job specializations:
-
Engineering
Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
A leading tech company is seeking an ASIC Design Verification Engineer I in San Francisco, CA. You will work collaboratively with a talented team on innovative communications and network processing silicon. Candidates should have recent or current Bachelor’s degree studies and be familiar with hardware description languages and RTL design tools. This is an entry-level, full-time position offering a chance to impact billions globally while working on cutting-edge technologies in a supportive, team-oriented environment.
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