Senior IP Physical Design Lead — RTL to GDSII
Job in
San Francisco, San Francisco County, California, 94199, USA
Listed on 2026-02-28
Listing for:
Eliyan
Full Time
position Listed on 2026-02-28
Job specializations:
-
Engineering
Systems Engineer, Engineering Design & Technologists
Job Description & How to Apply Below
This role offers the opportunity to oversee the entire design flow from RTL to GDSII while working with a team of experts. Candidates should have a strong background in physical design, timing closure, and mixed signal integration. Excellent communication and leadership skills are essential for ensuring alignment across engineering teams and successful project execution.
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Position Requirements
10+ Years
work experience
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