Cryptographic Protocol Engineer

Location: USA – Austin, TX and San Francisco Bay Area (Full‑Time)

Work Type: Onsite / Hybrid (Based on Project Needs)

Experience

Required:

5+ Years in DSP and ECC Algorithm Design

Compensation: USD 160,000 – 180,000 (plus benefits and stock options)

Our client, a Series‑D semiconductor innovator, specializes in programmable coherent DSP solutions that power the next generation of cloud and AI infrastructure. Backed by top‑tier investors such as Kleiner Perkins, Spark Capital, Mayfield, and Fidelity, the company recently exited stealth mode with $180M in funding.

This position seeks a senior Algorithm Engineer with deep expertise in Error Correction Codes (ECC) for the optical communication market. The selected candidate will play a pivotal role in designing, simulating, and optimizing ECC algorithms for cutting‑edge coherent optical transceivers operating at data rates up to 1600 Gbps.

• Design and simulate ECC architectures, defining key capabilities and performance metrics for implementation.
• Develop, model, and optimize ECC algorithms in MATLAB and C, integrating them with MODEM simulations.
• Collaborate with VLSI, System, Firmware, and Design Verification teams to align on specifications and system‑level design.
• Translate algorithmic models into fixed‑point representations suitable for hardware (RTL) implementation.
• Partner with digital and firmware designers to ensure accurate and efficient architecture implementation.
• Conduct lab‑based validation, debugging, and tuning of ECC and DSP algorithms to ensure optimal system performance.

• Minimum 5 years of hands‑on experience in ECC algorithm design and implementation.
• Strong proficiency in MATLAB and C/C++ for digital signal modeling and testing.
• Deep understanding of DSP systems and hardware constraints (MATLAB‑to‑RTL flow).
• Proven track record in simulating, validating, and optimizing ECC algorithms.
• Practical lab experience in debugging and performance tuning of algorithms.

• Prior experience with Optical Communication Systems or Coherent DSP.
• Familiarity with high‑speed DCI (Data Center Interconnect) architectures.
• Exposure to forward error correction schemes for communication hardware.
• Understanding of modulation techniques, system simulations, and VLSI integration workflows.