Principal Hardware Engineer – TeraWave Network Switch Platform
Listed on 2026-06-03
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Engineering
Systems Engineer, Electrical Engineering
Application Close Date
Applications will be accepted on an ongoing basis until the requisition is closed.
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!
Blue Origin is pioneering the future of space‑based communications with Tera Wave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi‑orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise‑grade connectivity for critical operations worldwide.
Principal Hardware Engineer – Network Switch PlatformBlue Origin's Emerging Systems business unit is building Tera Wave, a satellite communications constellation powered by the most advanced optical communications architecture ever attempted: thousands of optically interconnected satellites delivering symmetrical data speeds of up to 6 Tbps anywhere on Earth, providing enterprise and hyperscale customers with resilient, scalable connectivity for critical operations where terrestrial infrastructure cannot reach.
You will own the end‑to‑end hardware design of the switching subsystem from high‑speed Ethernet switch and PHY integration to power architecture, embedded management controllers, and high‑speed PCB layout. This is a hands‑on role for an engineer who has designed and shipped complex electronic products in fast‑moving environments and wants to apply that experience to hardware operating at orbital scale.
Special Mentions- Relocation assistance is available for qualified candidates.
- Travel:
Up to 25%.
- Architect BMC subsystems using MPSoC, ARM, or RISC‑V microprocessors to monitor line card health, thermal sensors, and voltage rails.
- Design and integrate low‑level communication buses (I2C, SPI, PMBus, SMBus, RS‑485, CAN) for hardware telemetry and sequencing control.
- Develop hardware watchdog circuits and redundant boot sequences for fault recovery. Enable in‑flight firmware reprogrammability via ground link, including secure update and rollback mechanisms.
- Architect high‑reliability power distribution with autonomous sequencing, redundant paths (e.g., ORing controllers), and fault isolation to eliminate single points of failure.
- Specify and integrate radiation‑hardened or radiation‑tolerant components rated for SEE and TID in the target orbital environment.
- Design power stages for thermal‑vacuum operation, emphasizing high‑efficiency topologies and conduction/radiation thermal transfer.
- Architect low‑noise power trees using high‑PSRR LDOs and multi‑stage LC filtering to protect sensitive analog and high‑speed digital lanes.
- Lead SPICE‑based transient analysis and hardware validation of load step responses, switching transients, and voltage ripple to millivolt‑level tolerances.
- Develop EMI/EMC mitigation strategies—grounding architecture, decoupling optimization, power/signal plane isolation—to prevent crosstalk between power distribution and high‑speed data paths.
- Lead multi‑layer PCB design for switch line cards: stack‑up definition, impedance‑controlled routing, thermal management, and DFM.
- Manage CCA BOM procurement, vendor coordination, and assembly oversight.
- Integrate BSPs, SDKs, and device drivers for Ethernet switching and network processor components in collaboration with firmware and software teams.
- Architect and bring up high‑performance Ethernet switching systems, including NPU/switch ASIC integration, PHY and Ser Des tuning, VLAN configuration, and MAC‑level validation across high‑density line cards.
- Resolve complex hardware‑software interface issues across L1 and L2, including physical layer bring‑up, transceiver integration, and MAC‑level debugging.
- Lead factory acceptance testing, physical layer…
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