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Senior FPGA Design Engineer Speed Timing & APG Core

Job in San Francisco, San Francisco County, California, 94199, USA
Listing for: SoloPoint Solutions
Full Time position
Listed on 2026-06-03
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below
Position: Senior FPGA Design Engineer - High-Speed Timing & APG Core

SoloPoint Solutions is seeking an experienced FPGA Designer in San Francisco, California. The ideal candidate will have over 5 years of experience working with large high speed FPGA designs, including understanding PLL circuits and timing constraints.

This role involves designing timing generators, signal formatting blocks, and working collaboratively with hardware and software teams on bring-up and driver development. A strong technical background in embedded systems and algorithmic pattern generation is essential.

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Position Requirements
10+ Years work experience
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