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Senior CMOS Layout Design Engineer Speed & Photonics
Job in
San Francisco, San Francisco County, California, 94199, USA
Listed on 2026-06-06
Listing for:
IC Resources
Full Time
position Listed on 2026-06-06
Job specializations:
-
Engineering
Systems Engineer, Electrical Engineering, Electronics Engineer, Engineering Design & Technologists
Job Description & How to Apply Below
IC Resources is looking for a skilled CMOS Layout Design Engineer in San Francisco, California. You will be responsible for developing custom layouts for high-speed, analog, and photonic integrated circuits, optimizing layouts for performance and manufacturability.
The ideal candidate has over 5 years of custom CMOS layout design experience and a Bachelor's degree in Electrical Engineering. This position offers competitive salary and benefits including comprehensive medical coverage and generous paid time off.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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