DESIGN Verification Engineer HCL
Listed on 2026-07-01
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Engineering
Hardware Engineer, Test Engineer
Design Verification Engineer
Greetings,
My name is Vipin and I am a Technical Recruiter at STI Org. I am reaching out to you on an exciting job opportunity with one of our clients.
Position: DESIGN VERIFICATION ENGINEER
Location:
On site at Austin, TX or Bay Area, CA
Contract:
W2/C2C/Full Time
Implemented By: HCL
End Client:
Google, Meta, Microsoft, Intel etc.
Requirements:
Strong knowledge Design & Verification methodologies of either of these (Times/Untimed SW Models), RTL IP, VIPs, UVM Env. Understanding of verification tools like Simulator, Synthesis etc. Hands on experience on C/C++, System Verilog, UVM, SystemC, RTL Understanding of some of the standard protocol interfaces like AMBA, Automotive, PCIe, USB etc. Excellent written and verbal interpersonal skills Self-motivated and great teammate [You can reply to this email with an Updated Resume and details of your Work Authorization if you're interested in working for this position.
For further information, feel free to reach out to me.]
Warm Regards, Vipin Pallakkat, Technical Recruiter, Software Technology Inc (STI).
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