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Link Validation Engineer

Job in San Francisco, San Francisco County, California, 94199, USA
Listing for: Conductor
Full Time position
Listed on 2026-08-10
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 110000 - 160000 USD Yearly USD 110000.00 160000.00 YEAR
Job Description & How to Apply Below

We’re looking for link validation engineers to help with DVT and bringup of the core optical link and PHY.

Ideal Background:

Ideal candidates for this role should have:

  • Hands-on experience with the bringup and DVT process of optical links and PHYs
  • Deep understanding of both PHY systems (both electrical and optical) and optical links (TDECQ, jitter, BER, etc)
  • Hands-on experience with contributing to the design process of PHYs and ideally electro-optic PHYs

Nice to Have:

  • Experience with clock forwarded optical links
  • Experience with both copper SERDES system bringup as well as optical PHY system bringup
  • Experience with wide and slow optical architectures
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