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Quality Engineering Test Engineer

Senior ASIC Verification Engineer — Space-Grade UVM

Job in San Francisco, San Francisco County, California, 94199, USA
Listing for: BLUE ORIGIN
Full Time position
Listed on 2026-08-22
Job specializations:
  • Engineering
    Quality Engineering, Test Engineer
Salary/Wage Range or Industry Benchmark: 197529 - 276539 USD Yearly USD 197529.00 276539.00 YEAR
Job Description & How to Apply Below
BLUE ORIGIN is seeking an experienced engineer to lead verification efforts in San Francisco. The role involves developing and executing verification plans, creating UVM environments, and mentoring junior engineers. Applicants should have a strong background in System Verilog and ASIC verification, with 5-8+ years of experience required. Competitive compensation and comprehensive benefits including medical, dental, and a 401(k) plan are offered.
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Position Requirements
10+ Years work experience
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