Lead Digital Design Engineer (RTL

SBT is the exclusive retained executive search firm for this position

This confidential client is a leading semiconductor company delivering advanced solutions across a diverse range of markets. With an engineering-driven culture, the team is composed of industry veterans and technical experts pushing the boundaries of innovation. They offer a collaborative environment focused on cutting-edge design, rigorous technical execution, and long-term product impact.

• Perform RTL implementation using Verilog/System Verilog for complex digital blocks, SoC subsystems, and high-performance interconnect logic
• Design and implement AMBA-based interfaces and interconnect components, including protocols such as AXI, AHB, APB, and ACE
• Develop RTL for coherent interconnect and cache-coherent subsystems using AMBA CHI, including transaction handling, ordering, coherency, flow control, and protocol state machines
• Optimize RTL and micro-architecture for performance, power, area, latency, and timing closure

• 7+ years of industry experience in RTL or digital design for ASIC or SoC development
• Master’s degree or Ph.D. in Electrical Engineering, Computer Engineering, or a related engineering field
• Deep expertise in RTL design using Verilog/System Verilog, including synthesis and design optimization
• Strong hands‑on experience with AMBA protocols, particularly AXI, ACE, and/or CHI
• Solid understanding of cache coherency, coherent interconnect architectures, transaction ordering, memory consistency, arbitration, and flow-control mechanisms
• Experience designing complex SoC interfaces, interconnect fabrics, protocol bridges, or cache/memory subsystem logic