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Principal RTL Design Engineer - Hybrid
Job in
San Francisco, San Francisco County, California, 94199, USA
Listed on 2026-08-28
Listing for:
Cypress HCM
Full Time
position Listed on 2026-08-28
Job specializations:
-
Engineering
Hardware Engineer
Job Description & How to Apply Below
Cypress HCM is seeking an experienced RTL design lead for ASIC/FPGA developments in a hybrid San Jose, CA Hillsboro, OR area. You will drive architecture decisions, mentor teams, and collaborate across verification, implementation, and customer engagements.
The role requires 8+ years of logic design, expertise in Verilog/System Verilog and UVM, and strong memories/interfaces knowledge. A BSEE or MSEE is preferred, with competitive benefits and stock options.
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