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Senior RTL Design Engineer — Memory Subsystems AI
Job in
San Francisco, San Francisco County, California, 94199, USA
Listed on 2026-09-01
Listing for:
IC Resources
Full Time
position Listed on 2026-09-01
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer, Test Engineer
Job Description & How to Apply Below
A leading semiconductor company is hiring a Senior RTL Design Engineer to develop memory subsystems in high-performance AI accelerators. The role requires expertise in System Verilog, HBM/LPDDR/DDR memory technologies, and timing closure. Ideal candidates will have 8+ years of experience and a BS/MS in Electrical or Computer Engineering. This full-time role offers a competitive salary ranging from $190,000 to $230,000 per year.
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Position Requirements
10+ Years
work experience
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