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Senior RTL Network Architect AI Accelerators

Job in San Francisco, San Francisco County, California, 94199, USA
Listing for: Nicedesignjobs
Full Time position
Listed on 2026-09-09
Job specializations:
  • Engineering
    Hardware Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 210000 - 270000 USD Yearly USD 210000.00 270000.00 YEAR
Job Description & How to Apply Below
Position: Senior RTL Network Architect for AI Accelerators

OpenAI is seeking a senior RTL engineer to own on-chip and off-chip communication components for a custom AI accelerator platform. You will drive microarchitecture, System Verilog implementation, verification, and silicon bring-up for high-bandwidth NoC fabrics and network interfaces.

The role requires hands-on leadership, collaboration with architecture and performance teams, and mentoring junior engineers to ensure production-ready silicon across complex interconnects.

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Position Requirements
10+ Years work experience
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