Senior Firmware Engineer; PCIe​/CXL Memory Solutions

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Science, or a related technical field
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• 5+ years of hands-on experience in embedded firmware development using C
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• Deep expertise in low-level firmware for hardware bring-up, traffic enablement, and RAS (Reliability, Availability, Serviceability) feature implementation
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• Proven track record working with high-speed interfaces and protocols such as PCIe, CXL, DDR, and I2C
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• Hands on experience in CPU to Device, Device to Device flows like MMIO, DMA, PCIe P2P

• Astera Labs is seeking experienced Senior Firmware Engineer PCIe/CXL Memory Solution to lead the design and development of embedded firmware for cutting-edge PCIe/CXL memory expansion products tailored for AI and Cloud infrastructure. This role is pivotal in enabling next-generation memory devices that power high-performance computing platforms. This position will be required onsite
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• Firmware development, bring-up, and validation of PCIe/CXL/DDR interfaces at PHY and Link layers
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• Interpret technical specifications and develop robust, low-level C code in RTOS environments
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• Collaborate effectively with cross-functional teams and external partners to deliver weekly firmware releases and feature demonstrations
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• Strong debugging skills and ability to triage and resolve issues in complex embedded systems
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• Familiarity with server I/O and memory workflows, performance tuning for latency and bandwidth optimization is a plus
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• Experience with pre-silicon validation in emulation environments is desirable