HW​/SW Codesign Lead

About Phinity

Phinity is building prompt-to-silicon. We are creating the closed-loop system that lets AI agents design, verify, optimize, and tape out chips end-to-end. By 2028, any company will be able to specify a set of requirements for a chip and Phinity will deliver them a GDS file in weeks, not years.

We are working with leading frontier model labs and growing exponentially. Our team brings together deep AI and silicon expertise: training chip-design models at NVIDIA, doing formal reasoning post-training at scale, exiting a synthetic data company, leading the LPU team at Groq, and building chips at AMD, Intel, and Media Tek for over 10+ years. We are building an exceptional, highly efficient team to dismantle the current chip industry.

The HW/SW Codesign Engineer role is for an engineer who works at the boundary between silicon and software and wants to define how a new chip actually gets used, heavily using AI to speed up development. Some example responsibilities include:

• Design the hardware/software interface for edge compute chips: the programming model, command processors, memory movement, and runtime-visible scheduling that let software drive the hardware
• Build and own the firmware, drivers, and runtime for chip bring-up and expose its capabilities to software
• Make co-design tradeoffs across the boundary, deciding what belongs in hardware, firmware, or software, and own the technical bar for how they fit together
• Validate the subsystem across emulation, FPGA, and bring-up, making sure software-visible behavior matches intent

• Build a real chip with unlimited AI usage
• Access non-publicly released foundation models and learn what the frontier of intelligence is before everyone else
• Own the hardware/software interface for a novel chip end-to-end

We offer competitive salary and equity. We work in-person from SF and also have benefits including:

• Health insurance
• Retirement plans
• Unlimited PTO
• Paid parental leave
• Lunch and dinner provided in-office