Principal Engineer, Architecture & Performance Research Engineer Data Center and Agentic AI CPU

Principal Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU

San Jose, California, United States

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Principal Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU

Architecture Research Lab is focused on researching next-generation CPU (RISC-V) microarchitecture and performance for emerging computing workloads. We explore new architectural ideas, evaluate their performance potential, and rapidly turn promising concepts into working designs that can be validated on real silicon. Our research is driven by emerging opportunities in data center and agentic AI workloads, where we investigate how CPU architecture can evolve to meet new performance and efficiency requirements.

We also explore CPU-memory co-design from the CPU perspective, in alignment with the broader shift toward memory-centric architectures. A distinctive aspect of our team is the way we approach architecture research. We develop and apply AI-driven methodologies to accelerate architectural exploration, broaden the design space we can investigate, and quickly iterate from ideas to implementation and silicon validation. Rather than simply following established design flows, we continuously seek new ways to explore, evaluate, and realize CPU architectures.

The role offers an opportunity to work across the full spectrum of architecture research—from workload and performance analysis, microarchitectural innovation, and architectural modeling to implementation and silicon validation—while helping shape new methodologies for how future CPUs are designed.

Location:

Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

As a Principal CPU Architecture & Performance Engineer, you will define the architectural vision and performance direction for next-generation CPU platforms. You will identify opportunities across emerging workloads, shape long-term architectural strategies, develop and refine performance models, and drive new microarchitectural concepts across multiple architectural domains. You will work closely with RTL design teams and cross-functional engineering partners to translate architectural vision into implementable designs, influence key technical decisions, and validate architectural choices from modeling through silicon.

The role carries broad technical ownership, with the opportunity to establish new research directions, drive architecture across multiple generations of CPUs, and shape the fundamental design choices that determine future CPU performance and capabilities.

• Define the application-specialization direction for next-generation CPU cores, including agentic AI and memory-centric architectures, and lead the overall microarchitectural vision
• Lead end-to-end performance analysis using architectural simulators and RTL, guiding key architectural trade-offs and decisions
• Translate workload characterization and performance insights into architectural requirements and long-term design direction
• Drive architecture-to-implementation alignment with design teams, ensuring architectural intent is carried through RTL and silicon
• Mentor Senior and Staff engineers and provide technical leadership across multiple projects and architectural domains
• Drive research and technical contributions leading to patents and publications

What You Bring

• Master's degree in Computer Engineering, Computer Science, or a related field with 18+ years of relevant experience, or PhD with 15+ years of relevant experience
• 8+ years of experience in CPU microarchitecture, architecture research, or…