Staff Engineer, Architecture & Performance Research Engineer Data Center and Agentic AI CPU

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Staff Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU

What You’ll Do

Architecture Research Lab is focused on researching next-generation CPU (RISC-V) microarchitecture and performance for emerging computing workloads. We explore new architectural ideas, evaluate their performance potential, and rapidly turn promising concepts into working designs that can be validated on real silicon. Our research is driven by emerging opportunities in data center and agentic AI workloads, where we investigate how CPU architecture can evolve to meet new performance and efficiency requirements.

We also explore CPU-memory co-design from the CPU perspective, in alignment with the broader shift toward memory-centric architectures. A distinctive aspect of our team is the way we approach architecture research. We develop and apply AI-driven methodologies to accelerate architectural exploration, broaden the design space we can investigate, and quickly iterate from ideas to implementation and silicon validation. Rather than simply following established design flows, we continuously seek new ways to explore, evaluate, and realize CPU architectures.

The role offers an opportunity to work across the full spectrum of architecture research—from workload and performance analysis, microarchitectural innovation, and architectural modeling to implementation and silicon validation—while helping shape new methodologies for how future CPUs are designed.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job

As a Staff CPU Architecture & Performance Engineer, you will shape the architecture and performance direction of next-generation CPU architectures. You will identify opportunities across emerging workloads, develop and refine performance models, evaluate system-level architectural trade-offs, and drive new microarchitectural concepts from research to implementation. You will work closely with RTL design teams to translate architectural concepts into implementable designs, guide key technical decisions, and validate their impact from modeling through silicon.

The role offers broad ownership across architectural domains, with the opportunity to define new research directions, influence CPU architecture strategy, and drive ideas that can deliver meaningful performance gains in real hardware.