Sr Account Technical Executive II

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As an Account Technical Executive (ATX) focused on Digital/Custom IC / Analog / RF design, you will serve as the primary technical leader driving adoption and value realization of the Cadence Innovus Platform , Digital IC flows , Cadence Virtuoso Platform, including Virtuoso Layout Suite and associated Custom IC design flows.

You will partner closely with strategic sales teams and key customer stakeholders (design leads, CAD teams, and methodology owners) to solve complex digital and custom IC design challenges, with a strong emphasis on layout implementation, analog and mixed-signal productivity, and advanced-node methodologies. This role also plays a key part in driving next-generation design methodologies by leveraging AI-driven and agent-based workflows, helping customers adopt intelligent automation frameworks that enhance productivity, design quality, and time‑to‑market.

• Lead technical engagement for Digital IC/Custom IC / Analog / RF design flows, with a primary focus on Innovus and Virtuoso platforms along with signoff technologies
• Partner with customer design and CAD teams to optimize layout productivity, quality, and time-to-market
• Drive adoption of advanced capabilities such as:
  Constraint-driven and automation-assisted layout Device-level and full-chip layout methodologies Advanced node layout challenges (FinFET, GAA) EM and IR-aware layout and parasitic extraction flows
• Champion the integration of AI-driven design techniques, including:
  Agentic AI workflows to automate design exploration, layout optimization, and verification tasks AI-assisted decision-making for layout trade-offs including PPA, matching, and parasitics
• Translate customer pain points into actionable requirements for R&D and product engineering
• Provide technical leadership in methodology definition, flow development, and best practices
• Influence competitive replacements and expand footprint of Cadence Custom IC solutions
• Support executive-level discussions by linking technical value such as PPA, productivity, and risk reduction to business outcomes

• Digital IC Deep hands‑on experience with digital design flow including Genus/Innovus , Quantus , Tempus and Pegasus
• Clear understanding of PPA tradeoff’s and other key concerns for design teams
• Ability to think full stack/flow – interconnect technologies and drive value proposition
• Experience working with design teams on large SOC tapeouts
• Understanding of foundry working model and care bouts – knowledge of PDK enablement , DTCO and technology entitlement a plus
• Custom IC and Virtuoso Expertise Deep hands‑on experience with the Cadence Virtuoso Platform, including:
  Virtuoso Layout Suite (XL, GXL, EXL) Schematic-driven layout and LVS flows DRC and physical verification integration
• Strong knowledge of custom analog and mixed‑signal layout techniques, including:
  Device matching, symmetry, common centroid, and shielding Parasitic‑aware layout for high‑performance analog and RF circuits
• Experience with the Spectre simulation environment and layout‑to‑schematic integration
• Familiarity with PCell development, layout automation, and scripting (SKILL preferred)
• Agentic AI and Intelligent Design Automation Strong understanding of AI and machine learning applications in semiconductor design, specifically:
  Agentic AI frameworks such as multi-agent systems, goal-driven automation, and autonomous optimization AI-assisted layout generation and design space exploration Intelligent automation of repetitive design and verification tasks Experience or demonstrated interest in:
  Applying AI to EDA workflows, CAD flows, or design methodology…