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ATE Test Engineer

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Tetramem
Full Time position
Listed on 2026-02-16
Job specializations:
  • Engineering
    Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 200000 USD Yearly USD 150000.00 200000.00 YEAR
Job Description & How to Apply Below

Overview

At Tetra Mem, we are redefining the future of AI with our groundbreaking innovations in In-Memory Computing. Leveraging world-record multi-level RRAM technology, we deliver highly efficient solutions for AI computations, enabling superior performance and energy efficiency across applications ranging from edge devices to data centers. Our talented team of engineers and industry-leading executives drives this progress, making Tetra Mem a leader in advanced memory technologies.

If you are passionate about cutting-edge technology and thrive in a fast-paced, collaborative environment, Tetra Mem is the place for you. Join our global team to shape the future of AI computations and sustainable technology solutions while working at the forefront of innovation. Together, we can make a lasting impact.

Responsibilities
  • Develop, debug, and release ATE test programs on Teradyne J750 and Ultra

    FLEXplus using IG-XL
  • Own tester setup, configuration, and correlation from bench to ATE
  • Support facility and tester infrastructure bring-up (power, cooling, networking, safety, handler/prober integration)
  • Drive test coverage, yield, and throughput optimization for mass production
  • Lead test transfer from NPI to HVM, including guard banding and cost reduction
  • Collaborate with design, validation, and product teams on testability and debug
  • Interface with OSATs and external vendors for test development, qualification, and ramp
  • Support failure analysis, silicon debug, and yield excursions in production
Qualifications
  • Hands-on experience with Teradyne J750 and/or UltraFLEXplus
  • Strong proficiency in IG-XL (test flow, timing, levels, binning, data logging)
  • Solid understanding of ATE hardware, load boards, handlers/probers, and DIBs
  • Experience bringing tests into high-volume manufacturing
  • Proven ability to work with OSATs and test vendors
  • Knowledge of DFT concepts (scan, MBIST, IDDQ, etc.) is a plus
  • Strong debug, ownership, and cross-functional communication skills
Nice to Have
  • Multi-site optimization and test time reduction
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