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Senior Package Design Engineer SoCASIC SIPI Focus in San Jose CA

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Great Bay Staffing Group
Full Time position
Listed on 2026-02-16
Job specializations:
  • Engineering
    Electrical Engineering, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 190000 - 220000 USD Yearly USD 190000.00 220000.00 YEAR
Job Description & How to Apply Below

Join a growing custom SoC/ASIC development company at the forefront of advanced semiconductor technology. As a Senior Package Design Engineer
, you’ll lead high-performance package substrate design with a focus on signal integrity (SI),
power integrity (PI), and advanced routing. This is a hands‑on technical role where your expertise directly impacts next‑generation silicon solutions and contributes to a strong and expanding IP portfolio.

Why You’ll Love This Role
  • Competitive pay: $190,000–$220,000 plus relocation support
  • Work on outstanding, cutting‑edge technology
  • Join a growing company with significant proprietary IP
  • Collaborative environment where everyone contributes
  • Strong opportunity to learn, grow, and expand your technical depth
Your Day-to-Day
  • Lead package substrate design and analysis
    , including SI/PI optimization and advanced routing
  • Perform modeling and simulation using tools such as HFSS and ADS
  • Drive high-speed package and PCB design solutions for technologies like Ser Des, PCIe, LPDDR, and Ethernet
  • Conduct time- and frequency-domain analysis including impedance, jitter, eye-diagram, and BER analysis
  • Support PDN modeling
    , electro-thermal simulation, and reliability considerations
  • Collaborate closely with layout engineers, marketing teams, and global design partners across the U.S. and overseas
  • Contribute technical expertise during pre- and post-sales activities
    , helping translate customer requirements into optimized package solutions
What We’re Looking For
  • BS in Electrical Engineering or related field (MS preferred)
  • 8–10 years of experience in semiconductor package design
  • Strong background in signal integrity and power integrity analysis
    , modeling, and simulation
  • Experience with tools such as HFSS, ADS, Hspice, and Redhawk
  • Expertise in high-speed package/PCB design and advanced interface standards
  • Familiarity with electro-thermal simulation, PDN modeling, reliability analysis
    , and packaging/assembly rules
  • Excellent communication, collaboration, and presentation skills
Ready to Apply?

If you’re an experienced Senior Package Design Engineer ready to shape high-performance semiconductor solutions and grow with an innovative SoC/ASIC company, this is your opportunity. Bring your SI/PI expertise, drive impact across global teams, and help build the next generation of advanced packaging technology. Apply today.

Compensation:
$220,000 per year

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Position Requirements
10+ Years work experience
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