Head of Cell Design and Materials

About Ensurge Micropower

Ensurge Micropower (OSE: ENSU) is a pioneer in solid-state microbattery technology, enabling the next generation of intelligent, connected devices. Leveraging proprietary thin-film and roll-to-roll manufacturing, Ensurge delivers safe, high energy-density batteries for applications in wearables, health tech, industrial sensing, and defense. With headquarters in San Jose and a global footprint spanning the U.S. and Europe, Ensurge is redefining what is possible in powering AI at the edge.

Ensurge solid-state microbatteries offer multiple times the energy density and charge cycles of lithium-ion alternatives. Our platform enables a wide range of battery shapes and form factors, unlocking new product designs and previously impossible applications

Join our team of battery innovators in a dynamic, supportive start-up environment to enable the next generation of hearables, wearables, and IoT-connected sensors with Ensurge’s groundbreaking solid-state microbatteries.

Ensurge is seeking a Head of Cell Design and Materials, reporting to the Chief Technology Officer, responsible for the technical direction for all cell platforms and is accountable for cell level readiness to scale. This role builds, leads, and scales the organization responsible for cell architecture, design rules, and the selection and qualification of critical materials across all product platforms. The ideal candidate has deep experience across these disciplines, including leading cross-functional execution with other departments and external vendors to optimize outcomes, setting budgets, and leading and building high-performing teams, including aligning team hiring prioritization with company goals.

This individual will serve as a leader and mentor to senior technical staff, and further recruit, onboard, and develop a high-performing team of cell design and materials engineers. The ideal candidate understands and knows how to push the boundaries of constraints such as form factor, volumetric energy density, reliability, safety, and lifecycle performance to keep Ensurge at the leading edge of solid-state microbattery technology.

This role defines the long-term cell technology roadmap and ensures alignment between customer requirements, platform evolution, and manufacturing scale.

• Own end-to-end cell architecture and design across all product platforms:
  • Layer stack architecture (anode / cathode / electrolyte / critical interfaces)
  • Thickness allocation, areal capacity, energy density trade-offs (VED, GED)
  • Mechanical, thermal, and electrochemical constraints at the cell level
• Define, document, and maintain cell design rules:
  • Design limits, margins, tolerances
  • Scaling rules across thicknesses, layer counts and form factors
• Lead cell architecture trade studies evaluating:
  • Performance vs. reliability vs. manufacturability
  • Near‑term customer specific designs vs. long‑term platform evolution
• Serve as technical authority for cell‑level decisions across all development programs

• Own long‑term materials strategy, balancing innovation, supply risk, cost, and manufacturability for:
  • Cathode materials and architectures, including freestanding cathodes
  • Solid‑state electrolyte selection and interface engineering
  • Current collectors, barrier layers, and interface optimization
• Define and own materials qualification criteria, covering:
  • Electrochemical performance and efficiency
  • Reliability, aging, and failure mechanisms
  • Manufacturability, scalability, and supply‑chain readiness
• Lead discussions with external suppliers and R&D partners to drive:
  • New materials introduction and evaluation
  • Co‑development, benchmarking, and down‑selection
  • Drive interface optimization through data‑driven DOEs and closed‑loop learning
  • Make build‑vs‑buy and partner selection decisions for critical materials technologies

• Act as the cell design owner across the Phase‑Gate development process:
  • POC → EVT → DVT → PVT → MP
  • Accountable for cell technical readiness to scale, including risk identification and mitigation plans
  • Own cell‑level go/no‑go recommendations at each phase gate
• Define…