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Senior Silicon Memory Validation Engineer – AI Hardware

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Astera Labs
Full Time position
Listed on 2026-02-18
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Electrical Engineering, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below
A technology company in San Jose is seeking a Senior Silicon Memory Validation Engineer to develop and execute electrical validation tests for their portfolio of connectivity products. The ideal candidate should have a strong background in electrical or computer engineering with at least 3 years of experience in complex SoC products and a solid proficiency in Python scripting. The role requires innovative problem-solving skills and familiarity with memory standards.

Competitive salary range is offered based on experience.
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Position Requirements
10+ Years work experience
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