SI​/PI Engineer

Tessolve is a leading provider of end-to-end engineering solutions with expertise in pre-silicon and post-silicon services, enabling efficient silicon bring-up and product delivery. Backed by a global team of 3,500+ employees, Tessolve offers turnkey solutions including ASIC design, silicon and system testing, and embedded product design services. With state-of-the-art labs and robust relationships with leading entities in EDA, IP, and foundries, Tessolve ensures cost-effective and innovative solutions.

The company specializes in cutting-edge technologies such as 5G, mmWave, silicon photonics, and system-level testing. Tessolve serves Tier 1 clients, start-ups, and government entities globally, with a presence across major regions including the United States, Europe, and Asia.

One of our valued customer is looking for the below Opportunity:

Experienced (>5y) Signal & Power Integrity Engineer to support high-speed interfaces (LPDDR5X, PCIe Gen7, UCIe 64G), with responsibilities extending into power delivery network (PDN) analysis.

• All SI tasks described above (channel modeling, extractions, eye analysis).
• Perform power integrity extractions and simulations for high-speed interfaces.
• Model and analyze package/board PDN
• Define decoupling strategy and validate against system requirements.
• Provide design guidelines balancing both SI and PI constraints.

• Strong background in both signal and power integrity.
• Hands‑on experience with SI tools (listed above).
• Proficiency with PI extraction/simulation tools (e.g., Power
  
  SI, SIwave, AEDT, HSPICE, equivalent).
• Knowledge of DDR, PCIe, UCIe standards and PDN design best practices.
• Strong analytical and communication skills.