Sr. Physical Verification Engineer
Listed on 2026-03-06
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Engineering
Systems Engineer
As a member of the ASIC implementation team, you will be involved in Sign-off flows including physical verification, ESD checking, and package RDL routing.
Requirements- Bachelors and 12+ years of related experience or Masters degree and 10+ years of related experience
- Strong background in full-chip physical verification (LVS/DRC/ANT/ERC)
- Strong scripting knowledge (perl, tcl and/or csh)
- Able to understand and debug rule decks
- Able to do block-level place & route
- Full-chip implementation is desirable
- Tool knowledge preferable:
Calibre, Redhawk & Totem, Cadence Virtuoso, Cadence Innovus, Synopsys ICC2
Job Description
The annual base salary range for this position is $141,300 - $226,000. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a competitive and comprehensive benefits package:
Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
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