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DFT & ASIC Design Intern — AI Hardware

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Etched
Apprenticeship/Internship position
Listed on 2026-04-19
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Systems Engineer, Computer Science
Salary/Wage Range or Industry Benchmark: 60000 - 80000 USD Yearly USD 60000.00 80000.00 YEAR
Job Description & How to Apply Below
A leading AI technology company in San Jose is seeking a DFT Intern for a 12-week paid internship. The role involves reviewing and refining DFT flow automation to support chip-level regression and contributing to various simulations. Ideal candidates should be pursuing a degree in electrical or computer engineering, with familiarity in Verilog or System Verilog and ASIC design concepts. The position offers mentoring from industry leaders and generous housing support for those relocating.
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