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Mechanical Engineer; CMOS​/SiPh

Job in San Jose, Santa Clara County, California, 95134, USA
Listing for: Advantest
Full Time position
Listed on 2026-06-02
Job specializations:
  • Engineering
    Mechanical Engineer, Product Engineer, Engineering Design & Technologists
Job Description & How to Apply Below
Position: Mechanical Engineer (CMOS/SiPh)
Job Description

Advantest is looking for a Mechanical Engineer for our San Jose, California office, to design, develop and support mechanical solutions, for customers in the standard Semiconductor (CMOS) and Silicon Photonics (SiPh) design/development and manufacturing/testing ecosystems.

Responsibilities:
  • Provide mechanical design support, including 3D modeling of parts and assemblies as well as generating related drawings.
  • Contribute to the planning and execution of Design of Experiments (DOEs).
  • Prepare and deliver technical presentations covering design concepts, reviews and DOE.
  • Support planning and implementation of design validation and product qualification activities, which may involve hands-on tasks, such as prototype fabrication and testing.
  • Support product definition and structuring in the Advantest PLM (Product Lifecycle Management) system
  • Communicate effectively and timely, in an organized and structured fashion, using collaboration/communication tools like Teams/SharePoint/Jira/Confluence/Webex
Minimum Qualifications:
  • Must be a Team player
  • BS or MS in Mechanical Engineering.
  • Minimum 5-year experience on 3D CAD modeling and 2D drawing, using commercial platforms.
  • Proficiency in Solid Works Simulation (FEA) for displacement, stress, and strain analysis.
  • Strong communication, presentation, and documentation skills.
  • Solid Microsoft Office suite skills.
  • Must be able to function independently, possess sharp problem-solving skills and identify recovery plans from unexpected setbacks.
  • Must be able to successfully perform in an intense work environment with dynamically changing priorities.
Preferred:
  • Knowledge of semiconductor manufacturing and testing ecosystems
  • Experience designing ATE/CMOS interfaces (load boards, probe cards, sockets, change kits)
  • Silicon Photonics system integration experience
  • Hands-on with ATE testers, handlers, probers, SLT
  • Advantest V93000 SOC testers experience
  • ATE handler experience
  • Wind Chill (PLM) experience
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