Failure Analysis Engineer. San Jose CA

Responsibilities

• Performing fault isolation and defect analysis/characterization on power IC’s to identify root causes of product failures in power supply applications and/or in production test.
• Provide comprehensive technical reports to customers on findings from product failure investigations.
• Provide corrective actions to internal and external customers based on the results of the analysis.
• Responsibility will also include effective verbal and written communication of results, which will be used to drive improvements in product design, process technology, and applications. Such communication will require, but not limited to, writing cogent and convincing technical reports suitable for external customers.
• Communicate with customers as necessary to address customer’s questions and concerns about failure analysis results.

• Minimum of 12 years of experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices.
• Hands‑on experience in failure analysis, and electrical fault isolation and defect characterization tools and techniques such as the following: ATE, curve trace, nano/micro‑probing, OBIRCH/EMMI microscopy, liquid crystal, CSAM, XRAY, FIB, SEM/EDX and manual cross‑sectioning and deprocessing techniques using both parallel‑polishing and wet chemical etch techniques.
• In‑depth understanding of both digital and analog circuits, device physics and IC fabrication processes.
• Ability to interpret IC ATE test data log is required. Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required.
• Verbal and reading, skills in Mandarin is required.
• Excellent English speaking, reading and technical writing skill is required.
• Candidates with direct experience in customer interface on resolution of customer quality problems will be given special consideration.
• Candidates with background and experience in automotive failure analysis/customer communication will be given special consideration.
• Preferences will be given to candidates who have a thorough understanding of analog, mixed‑signal, or power semiconductor operational characteristics and the ability to apply fault isolation techniques at chip level as well as PCB at power supply system level.

• BS in Electronic Engineering or equivalent discipline is required. A candidate with MSEE will be given preference.

Please send us your updated Resume at  for review.