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PIC Systems Design Engineer

Job in San Jose, Santa Clara County, California, 95111, USA
Listing for: Advanced Micro Devices, Inc.
Full Time position
Listed on 2026-06-10
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering, Electronics Engineer, Hardware Engineer
Job Description & How to Apply Below
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture.

We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE:

We are seeking a highly skilled PIC System Design Engineer to drive photonic integrated circuit system-level design, modeling, and validation of next-generation photonic integrated circuits for datacenter and AI interconnect applications. You will play a key role in aligning product specifications with hyperscale customer requirements and ensuring robust system performance from concept to deployment. THE PERSON:

The ideal candidate is a collaborative and proactive technical leader with strong communication skills, able to clearly translate complex photonics concepts and align cross-functional teams. They excel at driving consensus, navigating ambiguity, and solving challenging system-level reliability issues while maintaining a customer-focused mindset and strong attention to detail.

KEY RESPONSIBILITIES:

Photonic Integrated Circuit Architecture & Modeling Define PIC architecture for high-speed links (100G/200G per lane and beyond)
Perform link-level modeling and performance analysis, including:
Link budget, OSNR, dispersion, noise modeling and Impact of impairments (RIN, jitter, crosstalk, nonlinearities)
Develop detailed requirements, specifications, verification plans, and roadmaps for PICsSpecification Definition & Customer Engagement Engage directly with internal customers such as GPU/CPU system architects and external customers (hyperscalers, networking OEMs) on:

Technical discussions and architecture trade-offs Specification alignment (performance, power, reach, interoperability)
Translate customer requirements into internal design targets and system specifications

Design Trade-Off & Cross-Functional Alignment Work with Ser Des, optical device, packaging, and SI/PI teams to:

Optimize system performance across optical, electrical, and thermal domains

Balance performance, power, cost, and manufacturability

Pre-silicon & Post-silicon Validation Develop software design flows for ensuring first silicon success

Define test vectors based on a deep engineering understanding of integrated photonics first principles

Coordinate and work alongside test engineers to test BER, eye diagram, TDEC/TDECQ, sensitivity, optical power measurements, and other relevant metrics

Correlate simulation results with lab measurements and update models

Debug system-level issues across:

Optical components (laser, modulator, photodetector, etc)
Electrical interfaces (DSP, Ser Des, driver/TIA)
Packaging and coupling effects

System-Level Bring-Up & Debug Support Optical Engine bring-up on XPU and / or switch platforms

Conduct interoperability and system validation testing

Lead root cause analysis for performance gaps

PREFERRED EXPERIENCE:

Experience with high-baud optical communication devices and systems

Strong working experience in optical transceiver design, fiber optics, RF modulation, and networking systems.

Experience with schematic and layout design for photonic integrated circuits

Familiarity with MSA and IEEE standards for optical transceivers, CPO, NPO (e.g., OCI, QSFP, OSFP, CMIS).Experience testing transceiver performance: TDECQ, receiver sensitivity, stressed eye measurements.

System-level understanding of current and emerging optical transceiver / CPO / NPO architectures and standards.

Strong verbal and written communication skills, you must be a great team player and capable of interfacing across technical and managerial levels.

Strong problem-solving skills and collaborative, proactive attitude.

Willingness to travel when required. ACADEMIC CREDENTIALS:

MS or PhD in Electrical Engineering or related field.

LOCATION:

San Jose, CA #LI-TB2#LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants' needs under the…
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