Emulation Engineer

Emulation Engineer - 1071-1
12 months contract (W2)

Location:

San Jose, CA

• Palladium and Zebu is a must-have
• Candidates with Veloce experience may be considered if the hiring manager cannot find candidates with Palladium experience.
• Experience with Verilog/System Verilog
• UVM (nice to have)
• Any one IP or SOC brings up knowledge
• Experience with hardware/software core emulation setup
• Experience with C/C++ test cases
• Experience with virtual bridges and key bridges
• Scripting knowledge in Python
• SOC emulation experience
• Minimum 3 years of experience
• 12 Month Contract + Potential of extension
• First preference USC or GC
• At the moment, they are not actively looking for OPT EAD candidates. They may consider OPT EAD applicants, but only as a last option.

Skills

• Palladium and Zebu
• PCIE Validation
• Verilog/System Verilog
• Emulation

Interview: 3 rounds, 45 minutes each

• 1st round:
  Screening and Filter round (if selected, 2 more rounds)

Please make sure the candidate has actual hands-on experience working in an emulation environment.

Suggested screening questions:

• Can you walk me through the emulation flow you have worked on?
• Tell me about your emulation project and your specific responsibilities.
• Which emulation platforms have you used (e.g., Palladium, Zebu)?