ASIC Design Verification Engineer
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-14
Listing for:
Cisco Systems, Inc.
Full Time
position Listed on 2026-06-14
Job specializations:
-
Engineering
Systems Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
The application window is expected to close on: 08/25/2026. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.
Meet the TeamCome join us and take part in shaping Cisco’s revolutionary solutions for data centers by designing some of the most complex chips being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, telemetry, security, etc). Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world!
WhatYou’ll Do
- Participate in the ASIC design verification for Cisco high‑end switching products.
- Perform end-to-end verification of design blocks and top-level.
- Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.
- Construct testbench components like scoreboard, agents, sequencers, and monitors.
- Collaborate with the hardware, software designers, and vendors.
- Bachelor’s degree in electrical/computer science/computer engineering/related degree and 5+ years of related experience or Master’s in electrical/computer science/computer engineering/related degree and 3+ years of related experience, or PhD in electrical/computer science/computer engineering/related degree and 0 years of related experience.
- Prior experience in System Verilog and UVM.
- Prior experience with ASIC design and verification processes, debugging, methodology, and tools.
- Prior experience in verifying blocks/clusters or full chip level for ASIC.
- Experience with Linux, C/C++, and/or Python/Perl.
- Prior experience in emulation.
- Post‑silicon lab bring‑up experience.
- Experience in Networking.
- Experience with Formal verification.
- Experience with AI agents (i.e Cursor, Codex, CoPilot, etc…)
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