×
Register Here to Apply for Jobs or Post Jobs. X

ASIC Design Verification Engineer

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Cisco Systems, Inc.
Full Time position
Listed on 2026-06-14
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below

The application window is expected to close on: 08/25/2026. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

Meet the Team

Come join us and take part in shaping Cisco’s revolutionary solutions for data centers by designing some of the most complex chips being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, telemetry, security, etc). Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world!

What

You’ll Do
  • Participate in the ASIC design verification for Cisco high‑end switching products.
  • Perform end-to-end verification of design blocks and top-level.
  • Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.
  • Construct testbench components like scoreboard, agents, sequencers, and monitors.
  • Collaborate with the hardware, software designers, and vendors.
Minimum Qualifications
  • Bachelor’s degree in electrical/computer science/computer engineering/related degree and 5+ years of related experience or Master’s in electrical/computer science/computer engineering/related degree and 3+ years of related experience, or PhD in electrical/computer science/computer engineering/related degree and 0 years of related experience.
  • Prior experience in System Verilog and UVM.
  • Prior experience with ASIC design and verification processes, debugging, methodology, and tools.
  • Prior experience in verifying blocks/clusters or full chip level for ASIC.
Preferred Qualifications
  • Experience with Linux, C/C++, and/or Python/Perl.
  • Prior experience in emulation.
  • Post‑silicon lab bring‑up experience.
  • Experience in Networking.
  • Experience with Formal verification.
  • Experience with AI agents (i.e Cursor, Codex, CoPilot, etc…)
#J-18808-Ljbffr
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)
0
200
Filters
Education Level
Experience Level (years)
Posted in last:
Salary