Senior DFT Design Engineer FPGA/SoC Innovation
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-15
Listing for:
Altera
Full Time
position Listed on 2026-06-15
Job specializations:
-
Engineering
Engineering Design & Technologists, Electronics Engineer, Test Engineer, Systems Engineer
Job Description & How to Apply Below
Altera is seeking a DFT Design Engineer in San Jose, California, to define and implement DFT architectures for complex IC designs. This role involves working on advanced technologies, collaborating with design and test teams to ensure manufacturability and efficiency.
The ideal candidate has substantial experience in DFT at both RTL and gate levels, EDA tools for test logic insertion and validation, and proficiency in scripting. A Bachelor's or Master's degree in Engineering is essential.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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