Silicon Validation Intern: Characterization & Debug
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-06-15
Listing for:
Cadence Design Systems
Apprenticeship/Internship
position Listed on 2026-06-15
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer, Electrical Engineering, Electronics Engineer
Job Description & How to Apply Below
Cadence Design Systems is seeking a Post-Silicon Validation Engineering Intern in San Jose, California. In this on-site internship, you will be responsible for validating both system-level and electrical performance of internal silicon test chips.
The role involves debugging silicon issues in collaboration with design teams and delivering high-quality characterization reports. Candidates should have a degree in Electrical Engineering and strong analytical skills.
Prior experience in the hardware semiconductor industry and proficiency in Python or scripting tools are a plus.
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